Average salary: SG$6,349 /monthly
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10500 - 13000 SGD
...in developing or implementing AI tools for chip design, verification, or manufacturing. Familiarity with chip design tools (e.g., Synopsys, Cadence, Mentor) and AI platforms (e.g., TensorFlow, PyTorch) is highly preferred. Previous experience in promoting new tools/processes...7500 - 11000 SGD
...Electrical Engineering, VLSI, or related field. ~4+ years of experience in ASIC physical design ~ Hands-on expertise in EDA tools: Synopsys (ICC2, Fusion Compiler, PrimeTime), ~ Cadence (Innovus, Tempus), or equivalent. ~ Strong background in timing analysis, low-power...4750 - 9500 SGD
...niobate photonicsPDK development and compact modeling Hands-on experience with photonic simulation and layout tools such as Lumerical, Synopsys, Cadence, KLayout, or equivalent. Familiarity with PIC design flows, DRC/LVS verification, and tape-out methodologies. Strong...5000 - 5800 SGD
...knowledge in IC layout design, verification and design rule checking ~ Proficiency in IC design software, such as Cadence Virtuoso, Synopsys IC Compiler and Mentor Graphics Calibre ~ Strong understanding of CMOS design principles, semiconductor manufacturing processes and...6500 - 13000 SGD
...creation for meeting specifications MMMC optimization at Block and Sub-System Level Timing closure with Crosstalk and AOCV / POCV TCL scripting to fundamentally understand tool usage. Mandatory EDA Skills PnR tools such as Synopsys ICC/ICC2 and/or Cadence Innovus...7000 - 14000 SGD
...Computer engineering with 7 years or more experience in a relevant field. 2. Familiarity with one or more VLSI design tools (Cadence, Synopsys, Mentor & Ansys) for Place & Route, Spice Simulation, DRC/LVS Physical Verification, Static Timing Analysis and Power Integrity 3....5000 - 9000 SGD
...Lead Product Manager Synopsis Superminted is seeking a Lead Product Manager to lead the strategy, development and commercialisation of emerging AI-enabled products and solutions. This role combines product strategy, commercial thinking and technology adoption, with ownership...6000 - 8000 SGD
...~5 years or above experience in the area of layout design. ~ Knowledge in Electronic Design Automation (EDA) tools (e.g. Cadence, Synopsys, Mentor Graphic Calibre) ~ Knowledge in circuit reliability consideration for layout (e.g., ESD, latch-up, aging, EMIR) ~ Able to trouble...- ...tool – ideally ANSYS ~ Design and implement test harnesses of microfabricated structures ~ Package and assembly design experience ~ Experience working with commercial foundries ~ Familiarity with commercial design toolset (Synopsys, Custom Compiler etc.)...
7000 - 9000 SGD
...full product cycle is preferred. Strong programming skills in one or more of: Python, Java, Perl, or C++. Experience with Mentor, Synopsys, or Cadence EDA tools, or System Level Testing is a plus. ACADEMIC CREDENTIALS: ~ Bachelor/Master in Electrical/Electronic...7000 - 15000 SGD
...Knowledge of low-power design techniques and power integrity issues is a plus. Familiarity with industry-standard EDA tools from Synopsys, Cadence, or Siemens. Excellent problem-solving skills and a strong team-oriented mindset. Effective communication skills and the...7000 - 14000 SGD
...transistor reliability and EMIR analysis. Work closely with layout teams to oversee physical design and verification. Build Verilog, Synopsys Liberty and IBIS models. Create and maintain detailed technical documentation, including datasheets, application notes and...6000 - 8000 SGD
...planning, sensitive signal routing, current density and reliability considerations Familiar with SPICE simulation tool (e.g., Cadence spectre, Synopsys Custom Compiler, Calibre) · Strong Communication skills, high level of independence, self-motivation and good team player...6000 - 12000 SGD
...Power Integrity (PI), Physical Verification (PV), Formal Verification (FM), and Voltage-Current-Latency-Power (VCLP) signoff. Utilize Synopsys and Cadence ARP (Automated Routing and Place) tools to achieve high-quality physical design. Develop and utilize scripts in Tcl,...3000 - 5000 SGD
...Synopsis Superminted is seeking a Project Manager to independently manage small-to-mid-sized campaigns and accounts. This role is client-facing and execution-driven, requiring ownership of project objectives, budgets, timelines, resources, and cross-team collaboration to...- ...support of mask production. Use commercial CAD/EDA and in-house software on Linux, including GDSReticle, CATS, Calibre, Cadence, Synopsys, Mentor Graphics, and other data-processing tools. Extract photomask data and generate reports to support downstream process recipe...
8000 - 14000 SGD
...productivity and quality. Responsibilities: Synthesis Flow Ownership: Develop, maintain, and optimize RTL synthesis flows using Synopsys Design Compiler to support ASIC/AI SoC development. Synthesis Methodology: Design and improve synthesis methodologies, automation...8000 - 16000 SGD
...owning complex digital block/subsystems/SOC from netlist to tapeout. 4. Hands-on experience with industry-standard PD tools (e.g., Synopsys ICC2, Cadence Innovus). 5. Experience with floorplanning, partitioning, and cross-block timing closure. Preferred Qualifications...5000 - 10000 SGD
...functional coverage, and scripting languages such as Python/ Perl/ Tcl. Experience with industry-standard EDA tools (e.g., Cadence or Synopsys). Familiarity with AI/ML-assisted EDA tools or the use of generative AI to improve verification workflows is an advantage....5000 - 10000 SGD
...communication and Analytical skills Understanding of HDL (Verilog, VHDL) Experience in using leading EDA software tools like Cadence/ Synopsys We invite qualified candidates to apply online or email your CV to ****@*****.*** Ethos Search Associates Pte. Ltd...10000 - 16000 SGD
...AXI, AHB, APB). Hands-on experience with RTL simulation, debugging, and waveform analysis using industry-standard EDA tools (e.g., Synopsys, Cadence, or Siemens EDA / Mentor). Proficiency with SystemVerilog and modern verification methodologies such as UVM....6000 - 9000 SGD
...AMS verification, and/or digital design and verification flows ~ Proficiency with tools such as Cadence Virtuoso, Spectre, Xcelium, Synopsys HSPICE/PrimeSim, VCS, Keysight ADS, AWR, or equivalent ~ Strong communication, troubleshooting, and cross-functional collaboration...11250 - 22500 SGD
...Verification team for debugging and achieving Coverage closure; collaborate with the Backend/Mid-end teams to support Synthesis, SDC (Synopsys Design Constraints) generation, STA (Static Timing Analysis), and power optimization. 5. Low Power Design: Participate in the...4000 - 7000 SGD
...and dashboards to track validation progress, defect trends, and release readiness Conducted simulation studies using Verilog and Synopsys VCS to support debug and design verification Integrates AI-assisted tools and insights into daily work to improve efficiency, quality...5000 - 10000 SGD
...analysis, power and noise analysis and back-end verification across multiple projects. Proficient with backend design EDA tools, Synopsys ICC2 preferred Successfully track records of taping out complex SOC Working knowledge of deep sub-micron routing issues as they...5000 - 10000 SGD
...Python, Perl, Shell, andMakefile), as well as Verilog, SystemVerilog, C, and C++. Experience with AI-assisted backend EDA tools (e.g.,Synopsys, Cadence) is preferred. Self-motivated team player with strong verbal and written communication skills. We invite qualified...4400 - 8800 SGD
...support of mask production. Use commercial CAD/EDA and in-house software on Linux, including GDSReticle, CATS, Calibre, Cadence, Synopsys, Mentor Graphics, and other data-processing tools. Extract photomask data and generate reports to support downstream process recipe...- ...LVS, ANT, and ERC, along with debugging ~ Timing closure support in collaboration with STA teams ~ Hands-on use of tools such as Synopsys ICC2, Cadence Innovus, Calibre, and Voltus Experience integrating high-speed IPs such as SerDes or PHYs into SoC or chiplet-based...
5000 - 7000 SGD
...fields are preferred: TCAD (process & device) simulation and calibration Work under industrial EDA environment (Cadence, Mentor, Synopsys) for layout creation, drc and lvs check. Experienced with advanced RFSOI CMOS technologies. Strong communication and...4500 - 9500 SGD
...LVS, ANT, and ERC, along with debugging ~ Timing closure support in collaboration with STA teams ~ Hands-on use of tools such as Synopsys ICC2, Cadence Innovus, Calibre, and Voltus ~ Experience integrating high-speed IPs such as SerDes or PHYs into SoC or chiplet-based...