Silicon Photonics Scientist

About Silicon Photonics Business Division

Delta Silicon Photonics Business Division develops world-class silicon photonics chips and solutions that power next-generation sensors and intelligent systems. Our mission is to deliver smarter and safer environments - from machines and infrastructure to everyday life - by translating advanced silicon photonics into real-world impact that benefits people. We are a future-focused, innovative, and entrepreneurial team driven by deep technology expertise, bold execution, and a strong sense of purpose.

What You'll Be Doing

As a Scientist for PIC Process & Integration, you will be the primary technical authority bridging our internal sensor designs with external high-volume manufacturing partners. You will lead the technical strategy for Chip Integration and Advanced Packaging, ensuring that our proprietary photonic and electronic designs are seamlessly integrated into robust, high-performance sensor engines.

Your role is to translate product-level requirements into manufacturable architectures. You will drive deep technical collaborations with Silicon Photonics foundries and OSAT partners, navigating the complex trade-offs between design innovation and fabrication reality to bring next-generation coherent sensing solutions to life.

What It's Like Working With Us

You'll work in a highly technical, fast-moving environment where problems are complex and solutions are not always predefined. Collaboration is essential across engineering, product, operations, and supply-chain teams, and progress depends on clear thinking, trust, and ownership.

We value curiosity and continuous learning, and we expect team members to be comfortable navigating ambiguity, testing assumptions, and improving through iteration. People here are encouraged to take initiative, learn quickly from both successes and setbacks, and shape how work gets done.

Key Responsibilities

• Cross-Functional Product Integration & DfX : Serve as the lead technical authority bridging PIC/EIC Design and Product Engineering through the lens of Chip Integration and Advanced Packaging. Proactively drive Design-for-Manufacturing (DfM), Assembly (DfA), and Reliability (DfR) initiatives, ensuring architectural innovations are compatible with high-volume packaging constraints. Define clear technical trade-offs early in the design cycle to ensure the final sensor engine achieves product-level performance, thermal stability, and cost-efficiency.
• Chip Integration and Advanced Packaging Strategy : Lead the architectural definition and assembly flow development for PIC-EIC integration. Collaborate with OSAT partners to solve fundamental challenges in high-density interconnects, thermal management, and mechanical reliability for high-pin-count packages.
• Foundry Co-development & PDK Steering: Drive technical partnerships with Silicon Photonics foundries to customize PDK (Process Design Kit) components. Optimize device geometries-such as Strip and Rib waveguides-to ensure phase stability and low propagation loss essential for coherent sensing.
• External Process Control & DfM: Define and monitor Process Control Monitor (PCM) parameters and fabrication tolerances to ensure manufacturing variances remain within the limits of the overall system link budget.
• Yield & Metrology Strategy: Establish technical protocols for wafer-level optical probing and Known Good Die (KGD) verification to ensure high-performance reliability across the integrated assembly.

Qualifications

Education: Ph.D. in Physics, Optics, Photonics, Electrical Engineering, or a related field focusing on Integrated Photonics or Microelectronics.

Core Optics & Silicon Photonics Expertise :

• Strong theoretical and practical background in Classical Optics and Photonics, including wave optics, interference, and laser physics.
• Deep technical background in Silicon Photonics (SiPh) device physics, including passive and active component design (waveguides, phase shifters, photodetectors).
• Extensive experience in SiPh fabrication processes and hands-on familiarity with foundry PDK structures and design rules.

Manufacturing & Integration Experience:

• Significant experience in a Fabless environment managing technical interfaces with Foundry (Front-end) and OSAT (Back-end) partners.
• Proven track record in Advanced Packaging Development, specifically for high-performance heterogeneous integration (e.g., Flip-Chip, 2.5D, or 3D architectures).
• Strong understanding of Coherent Detection principles and the impact of fabrication variances on optical-electrical signal integrity.

Software Proficiency: Mastery of photonics simulation tools (e.g., Lumerical) and IC layout environments.

Mastery of IC and packaging layout environments (e.g., Cadence Virtuoso, Allegro X Advanced Package Designer, or similar advanced 3D-IC tools).